SD Get Bus Speed

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English
Table 26-26:      SD Get Bus Speed

Task

SD{0, 1}
Registers

Register Field

Register Offset

Bits

Value

Set block size to desired value.

reg_blocksize

xfer_blocksize

0x04

11:0

Block size value

Set up ADMA2 descriptor table (see Table: Setup ADMA2 Descriptor Table).

Set transfer mode with data direction and DMA enable.

reg_transfermode

xfermode_dmaenable | xfermode_dataxferdir

0x0C

4 and 1

0x11

Data cache invalidate range.

Send CMD6.

Check for transfer completed.

reg_normalintrsts

reg_errorintrsts

0x30

15

Read operation

Clear the interrupts (if any).

reg_normalintrsts

ALL

0x30

15:0

0xF3FF

Check transfer complete and clear if transfer is completed.

reg_normalintrsts

normalintrsts_xfercomplete

0x30

1

1b'1

Read response 0.

reg_response0

command_response

0x10

15:0

Read