Secured Register Sets

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

Some control register sets always require a secure transaction. All other register sets are protected by the XPPU protection unit except the SATA, PCIe, and GPU register sets are protected by the FPD_XMPU.

XPPU protected (majority of registers).

XMPU protected (SIOU controller registers).

Hardware protected (always secure registers).

The security protections for the register sets are listed with their addresses in Table: System-level Register Sets.