An Arm v8 includes the EL3 exception level that provides the following security states, each with an associated memory address space.
•In the secure state, the processor can access both the secure memory address space and the non-secure memory address space. When executing at EL3, the processor can access all the system control resources.
•In the non-secure state, the processor can access only the non-secure memory address space and cannot access the secure system control resources.
Secure and non-secure AXI transactions are sent through the system using the TrustZone protocols.
For more information on the Arm v8 security states, see APU MPCore TrustZone Model.