The slave monitor mode helps to monitor when the slave is in the busy state. The slave ready interrupt occurs only when the slave is not busy. This process can only be done in master mode.
1.Select slave monitor mode and clear the FIFOs. Write 60h to the Control register.
2.Clear the interrupts. Read and write back the read value to the ISR status register.
3.Enable the interrupts. Set the IER [SLV_RDY] bit = 1.
4.Set the slave monitor delay. Write Fh to the Slave_Mon_Pause register.
5.Write the slave address. Write the address to the Address register.
6. Wait for the slave to be ready. Poll on ISR [SLV_RDY] status register bit until = 1.