Status and Wakeup Interrupts

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

Each GEM Ethernet unit has 26 interrupt conditions that are detected and OR-ed together to generate an IRQ system interrupt. Additionally there is a wake-on-LAN interrupt driven from the Ethernet controller. Eight IRQ system interrupts (two from each GEM unit) are then routed to the RPU, APU, and Proxy GIC interrupt controllers and outputs in the PL. Refer to the gem.int_status register description for more information on the list of interrupt conditions detected by the controller.