Step 4:

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

For each allocated destination buffer descriptor object, program the following.

a.Program the destination data fragment to transfer into the destination buffer descriptor object. The ADDR LSB and ADDR MSB fields are programmed.

b.Program the size of each destination data fragment to transfer into each respective destination buffer descriptor. The SIZE field is programmed.

c.Set the coherency bit if the destination data buffer is not flushed or is not allocated as cache coherent. The coherency bit is valid only in the case of LPD DMA. The FPD DMA does not set support coherency at buffer descriptor or buffer level.

d.Set the DSCR element type to 1.

e.Setting the last source descriptor for interrupt reduces the number of interrupts received.et the INTR field if an interrupt is required after the data is read for a transfer. Typically, this is set for the buffer descriptor corresponding to the last source data fragment. Setting the last destination descriptor for interrupt reduces the number of interrupts received.

f.The non-final buffer descriptor command field can be set to 00 for the next descriptor valid. For the final buffer descriptor, set the command field to 10 for STOP after completing this descriptor.

 

TIP:   You can set 01 for pause after completing the descriptor if you want the DMA in a paused state after completing the final-buffer descriptor. The steps to come out of a paused state into a enabled/disabled state are described in Channel Paused.

g.Program the NEXT ADDR LSB and NEXT ADDR MSB to point to the next destination buffer descriptor. If this is the last buffer descriptor in a linked list, these fields must be NULL.