System Interfaces

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The controller clocks and resets are described in this section. All of the interrupts generated in the GPIO controller are routed to IRQ 48. The GPIO I/O signals can be routed to either the MIO or EMIO.