TBU Entry Updates

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The TCU uses a private AXI stream interface to update the translation tables in the TBUs.

This Figure shows how the two address translation stages in the SMMU can be used in the system with the APU MPCore, GPU, and other masters. The location of the six TBUs is shown in This Figure in PS Interconnect.

Figure 3-7:      Example of SMMU Locations in the System

X-Ref Target - Figure 3-7

X15290-smmu-locations.jpg