TX Configurable Driver

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

 

IMPORTANT:   This section outlines advanced features of the PS-GTR transceiver. Xilinx strongly advices using the default settings in the PCW.

The PS-GTR transceiver TX driver is a high-speed voltage-mode differential output buffer. To maximize signal integrity, it includes the following features.

Differential voltage control

Transmit de-emphasis control

Each controller modifies the differential output voltage and de-emphasis to default values based on the protocol selected. Table: Default Differential Output Voltage and De-Emphasis by Protocol shows these default values on a per protocol basis.

Note:   Xilinx recommends using the default TX differential output voltages and de-emphasis settings.

Table 29-3:      Default Differential Output Voltage and De-Emphasis by Protocol

Protocol

Default Differential Output Voltage
(Lx_TX_ANA_TM_16)

Default De-Emphasis (Lx_TX_ANA_TM_18)

USB3

850 mV

–3.5 dB

PCIe Gen. 1

850 mV

–3.5 dB

PCIe Gen. 2

850 mV

–3.5 dB (default) controller might modify this value to –6 dB during link-up.

GEM SGMII or 1000BASE-SX/LX

850 mV

0 dB

DisplayPort RBR, HBR, and HBR2

Controller modifies value during link-up.

Controller modifies value during link-up.

SATA Gen. 1, 2, and 3

425 mV

0 dB

Table: TX Configurable Driver Attributes defines the TX configurable driver attributes.

Table 29-4:      TX Configurable Driver Attributes

Register name

Address offset

Bit

Value and description

TX Swing

L0_TX_ANA_TM_15

L1_TX_ANA_TM_15

L2_TX_ANA_TM_15

L3_TX_ANA_TM_15

Lane 0: 0x0003C

Lane 1: 0x0403C

Lane 2: 0x0803C

Lane 3: 0x0C03C

6

Enable TX full/low swing setting.

1'b0: Default set by the PCW.

1'b1: TX swing defined by L0_TX_ANA_TM_15[7], L1_TX_ANA_TM_15[7], L2_TX_ANA_TM_15[7], or L3_TX_ANA_TM_15[7].

7

1'b0: Full swing (>0.8V) – default value.

1'b1: Low swing (>0.4)

TX Margin

L0_TX_ANA_TM_16

L1_TX_ANA_TM_16

L2_TX_ANA_TM_16

L3_TX_ANA_TM_16

Lane 0: 0x00040

Lane 1: 0x04040

Lane 2: 0x08040

Lane 3: 0x0C040

0

Enable TX driver swing control.

1'b0: Default set by the PCW.

1'b1: TX differential output defined by L0_TX_ANA_TM_16[3:1], L1_TX_ANA_TM_16[3:1], L2_TX_ANA_TM_16[3:1], or L3_TX_ANA_TM_16[3:1].

3:1

If full swing:

000 ® 0.85V – default value.

001 ® 0.85V

010 ® 0.6375V

011 ® 0.53125V

100 ® 0.425V

101 ® 0.31875V

110 ® 0.2656V

111 ® 0.213V

If low swing:

000 ® 0.478V – default value.

001 ® 0.478V

010 ® 0.372V

011 ® 0.2656V

100 ® 0.159V

101 ® 0.10625V

110 ® 0.053V

111 ® Reserved

TX De-emphasis

L0_TX_ANA_TM_18

L1_TX_ANA_TM_18

L2_TX_ANA_TM_18

L3_TX_ANA_TM_18

Lane 0: 0x00048

Lane 1: 0x04048

Lane 2: 0x08048

Lane 3: 0x0C048

7:0

8'b0000_0000 ® –6.0 dB de-emphasis

8'b0000_0001 ® –3.5 dB de-emphasis

8'b0000_0010 ® –0.0 dB de-emphasis – default value.

Other settings not supported

1'b0: Default set by the PCW.

1'b1: TX de-emphasis value set by L0_TX_ANA_TM[7:0], L1_TX_ANA_TM[7:0], L2_TX_ANA_TM[7:0], or L3_TX_ANA_TM[7:0].

L0_TX_ANA_TM_118

L1_TX_ANA_TM_118

L2_TX_ANA_TM_118

L3_TX_ANA_TM_118

Lane 0: 0x001D8

Lane 1: 0x041D8

Lane 2: 0x081D8

Lane 3: 0xC1D8

0

Force TX swing de-emphasis