UART Controller Register Overview

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

An overview of the UART registers is shown in Table: UART Registers.

Table 21-3:      UART Registers

Type

Register Names

Description

Configuration

Control

Mode

Baud_rate_gen

Baud_rate_divider

Configure mode and baud rate.

Interrupt processing

Intrpt_en

Intrpt_dis

Intrpt_mask

Chnl_int_sts

Channel_sts

Enable/disable interrupt mask, channel interrupt status, channel status.

RX and TX data

TX_RX_FIFO0

Read data received. Write data to be transmitted.

Receiver

Rcvr_timeout

Rcvr_FIFO_trigger_level

Configure receiver timeout and RXFIFO trigger level value.

Transmitter

Tx_FIFO_trigger_level

Configure TXFIFO trigger level value.

Modem

Modem_ctrl

Modem_sts

Flow_delay

Configure modem-like application.