Vendor Specific BIST Operation

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

As part of the host self-diagnostic operation, a vendor specific BIST mode is supported. This mode, in conjunction with SIOU's serial loop-back, allow for the test of the host controller operation. When programmed, the host fetches a command from the memory loop that manages the FIS through the transport and link layers and then posts the payload to the receive FIS area for checking. The mode exercises the following paths.

DMA controller FIS transmission.

Command layer FIS transmission.

Transport layer TX FIFO FIS transmission.

Link layer FIS transmission.

PHY modes.

Link layer FIS reception.

Transport layer RXFIFO and FIS reception.

Command layer FIS reception.

Host DMA controller FIS reception.

When the host controller indicates the command is complete, the software examines the contexts of the command descriptors statistics field. If the pre-programmed values are present, the test has passed.

The command list structure is shown in This Figure. To support the vendor BIST operation, the command header structure is modified. The reserved bit 11 of DW0 is now designated as VBIST, setting this bit indicates the associated command used as the payload for a vendor BIST operation.

Figure 32-2:      Command List Structure

X-Ref Target - Figure 32-2

X15504-sata-command-structure.jpg