Video Encoder

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The VCU encoder includes four interconnected HEVC/AVC encoders. It also contains global registers, an interrupt controller, and a timer. The VCU encoder is controlled by a microcontroller (MCU) subsystem. A 32-bit APB slave interface is used by the system CPU to control the MCU (to configure encoder parameters). Two 128-bit AXI4 master interfaces are used to fetch video input data and store video output data from/to the system memory. Two 32-bit AXI4 master interfaces are used to fetch the MCU software (instruction cache interface) and load/store additional MCU data (data cache interface).