Wait for the PL Done Status

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

Wait for the PL done status before doing anything else. This indicates the bitstream is programmed properly, as described in the following steps.

1.Wait for the PL done status: Poll while the csu.pcap_status[pl_done] bit is clear.

2.Once it is done, reset the PCAP interface: Set the csu.pcap_reset[reset] bit.