Write Address Channel

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

Write address queue (WAQ) is used to store all the addresses for write requests from a given port. There is a single queue for all AXI IDs from a given port. The write-address channel behavior is similar to the read-address channel. Write address and read address channels are independent and the ordering between the write and read requests might not be preserved. To preserve the sequence, a higher-level protocol needs to wait for a read/write response before sending the next transaction. Transactions across the ports are independent and can be issued in any order. The write command is not forwarded to the DDRC until the write data is collected and the strobes are evaluated.