Write Data Channel

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The AXI write data channel has a data storage queue. This queue is used as a registering layer between the AXI domain and DDR controller. At the output of the write-data queue (WDQ), some beats of a write data can be masked depending on alignment, burst size, and burst length. DDR write data from each port is forwarded to the DDRC, which forwards the data to the DDR.