Write a Bitstream Through the PCAP

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2023-12-21
Revision
2.4 English

1.Set the secure stream switch configuration to receive from DMA source: Set the csu.csu_sss_cfg[pcap_sss] to 0x5.

2.Configure and set the CSU_DMA to establish channel and transfer. Use the following for CSU DMA programming (see the Programming the CSU DMA section for details).

a.Channel type is DMA_SRC.

b.Source address is the address of the bitstream.

c.Size is bitstream size in words.

3.Wait for the CSU DMA operation to finish. on the source channel (see the Programming the CSU DMA section for details).

4.Clear the CSU_DMA interrupts and acknowledge the transfer is completed: Set the csudma.csudma_src_i_sts[done] bit.

5.Wait for PCAP done: Poll while the csu.pcap_status[pcap_wr_idle] bit is cleared.