XMPU Protection of Slaves

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The XMPU is a region-based memory protection unit. This section describes the XMPU in detail, including configuration and functionality.

The XMPU interface consists of the following features:

Slave AXI port to receive a transaction.

Master AXI port with poison output.

APB slave for programming the control registers.

Interrupt for AXI and register access violations.

AXI clock (same for master and slave ports) and APB clock for register programming.

Lock register - once set, the lock is only resettable by a POR reset.

Memory partitioned and protected to isolate a master or a given set of masters to a programmable set of address ranges.

Six DDR XMPUs provide 1 MB memory apertures.

FPD and OCM XPMUs provide 4 KB memory apertures.

TrustZone protection for ports going into the DDR memory controller is provided using secure/non-secure bits in the register for masters that cannot drive the AxPROT[1] bit.

AXI transaction permission violation interrupt.

APB slave interface address decode error interrupt.