XPPU and XMPU Protection Units

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2023-12-21
Revision
2.4 English

The AXI interconnect has two types of protection units to monitor bus transactions on an AXI channel. Each unit determines if the type of transaction and its master are allowed to access the memory location. The XMPU appears on several AXI channels to protect the DDR system memory, OCM memory, and the SIOU address space. There is one XPPU to protect the IPI buffers, control and status registers on the IOP inbound switch, other non-DDR memory, and the Quad-SPI memory space.

The protection units are shown in This Figure as one blue and several small red rectangles.