Xilinx Memory Protection Unit

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2022-09-15
Revision
2.3 English

The XMPU is a region-based memory protection unit. In this chapter, an AXI port interface is referred to as an AXI port. An incoming read or write request on an AXI port in one of the XMPUs is checked against each XMPU region. Any read or write transactions to the DDR regions undergo predefined checks and only when they pass these checks are the transactions allowed. Read and write permissions are independently checked. If the check fails, then the transaction is handled as described in the XMPU Error Handling section in the System Protection Units.

The addresses and master IDs are used for checks. If the address and ID range checks are true, and if the memory region is configured as secure, then only a secure request can access this region. If the transaction is non-secure and the region is configured as secure, the check fails, and the transaction is handled as described in the XMPU Error Handling section. If the region is configured as secure, the region's read/write permissions determine if reads or writes are allowed.

If a read (or write) security check passes but the permission check fails, then the XMPU poisons the request, records the address and master ID of the first transaction that failed the check, flags a read (or write) permission violation, and optionally generates an interrupt. For more details, refer to the XMPU Error Handling section.