ACIOCR1 (DDR_PHY) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ACIOCR1 (DDR_PHY) Register Description

Register NameACIOCR1
Offset Address0x0000000504
Absolute Address 0x00FD080504 (DDR_PHY)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAC I/O Configuration Register 1

ACIOCR1 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
AOEMODE31:0rwNormal read/write0x0SDRAM Address OE Mode Selection.
Bits [1:0] for A[0], bits [3:2] for A[1].. bits [31:30] for A[15]
Valid values are:
00: OE Dynamic
01: OE always ON
10: OE always OFF
11: RESERVED