ADDRMAP3 (DDRC) Register Description
| Register Name | ADDRMAP3 |
|---|---|
| Offset Address | 0x000000020C |
| Absolute Address | 0x00FD07020C (DDRC) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Address Map Register 3 |
This register is static. Static registers can only be written when the controller is in reset.
ADDRMAP3 (DDRC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| addrmap_col_b9 | 27:24 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 9. - Half bus width mode: Selects the HIF address bit used as column address bit 11 (10 in LPDDR3 mode). - Quarter bus width mode: Selects the HIF address bit used as column address bit 13. Valid Range: 0 to 7, and 15 Internal Base: 9 The selected HIF address bit is determined by adding the internal base to the value of this field. If set to 15, this column address bit is set to 0. Note: Per JEDEC DDR3 specification, column address bit 10 is reserved for indicating auto-precharge, and hence no source address bit can be mapped to column address bit 10. In LPDDR3, there is a dedicated bit for auto-precharge in the CA bus and hence column bit 10 is used. |
| addrmap_col_b8 | 19:16 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 8. - Half bus width mode: Selects the HIF address bit used as column address bit 9. - Quarter bus width mode: Selects the HIF address bit used as column address bit 11. Valid Range: 0 to 7, and 15 Internal Base: 8 The selected HIF address bit is determined by adding the internal base to the value of this field. If set to 15, this column address bit is set to 0. Note: Per JEDEC DDR3 specification, column address bit 10 is reserved for indicating auto-precharge, and hence no source address bit can be mapped to column address bit 10. In LPDDR3, there is a dedicated bit for auto-precharge in the CA bus and hence column bit 10 is used. |
| addrmap_col_b7 | 11:8 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 7. - Half bus width mode: Selects the HIF address bit used as column address bit 8. - Quarter bus width mode: Selects the HIF address bit used as column address bit 9. Valid Range: 0 to 7, and 15 Internal Base: 7 The selected HIF address bit is determined by adding the internal base to the value of this field. If set to 15, this column address bit is set to 0. |
| addrmap_col_b6 | 3:0 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 6. - Half bus width mode: Selects the HIF address bit used as column address bit 7. - Quarter bus width mode: Selects the HIF address bit used as column address bit 8. Valid Range: 0 to 7, and 15 Internal Base: 6 The selected HIF address bit is determined by adding the internal base to the value of this field. If set to 15, this column address bit is set to 0. |