AV_BUF_AUDIO_RDY_INTERVAL (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

AV_BUF_AUDIO_RDY_INTERVAL (DISPLAY_PORT) Register Description

Register NameAV_BUF_AUDIO_RDY_INTERVAL
Offset Address0x000000B128
Absolute Address 0x00FD4AB128 (DISPLAY_PORT)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAV_BUF_AUDIO_RDY_INTERVAL. Debug register.

AV_BUF_AUDIO_RDY_INTERVAL (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CH1_INT31:16rwNormal read/write0x0Audio Channel 2 ready interval.
CH0_INT15:0rwNormal read/write0x0Audio Channel 1 ready interval.