AV_BUF_FORMAT (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

AV_BUF_FORMAT (DISPLAY_PORT) Register Description

Register NameAV_BUF_FORMAT
Offset Address0x000000B000
Absolute Address 0x00FD4AB000 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionAV_BUF_FORMAT: This register should be programmed based on the Video/Graphics packing format in memory. DP unpacker works based on this

AV_BUF_FORMAT (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:12razRead as zero0x0
NL_GRAPHX_FORMAT11:8rwNormal read/write0x0Graphics Format:
0: RGBA8888
1: ABGR8888
2: RGB888
3: BGR888
4: RGBA5551
5: RGBA4444
6: RGB565
7: 8BPP
8: 4BPP
9: 2BPP
10: 1BPP
NL_VID_FORMAT 4:0rwNormal read/write0x0Video Format:
0: Cb-Y0-Cr-Y1 (422 Interleaved)
1: Cr-Y0-Cb-Y1 (422 Interleaved)
2: Y0-Cr-Y1-Cb (422 Interleaved)
3: Y0-Cb-Y1-Cr (422 Interleaved)
4: YV16 (422 Planar)
5: YV24 (Planar)
6: YV16ci (422 Semi Planar)
7: Monochrome
8: YV16ci2 ((422 Semi Planar)
9: YUV444
10: RGB888
11: RGBA8880
12: VID_RGB888_10BPC
13: VID_YUV444_10BPC
14: YV16CI2_10BPC (422 semi planar - Cb/Cr swapped)
15: YV16CI_10BPC( 422 semi planar)
16: YV16_10BPC (422 Planar)
17: YV24_10BPC
18: Y_ONLY_10BPC
19: YV16_420 (420 Planar)
20: YV16CI_420 (420 Semi Planar)
21: YV16Ci2_420 (semi planar with Cb/Cr swap)
22: YV16_420_10BPC
23: YV16Ci_420_10BPC (semi planar 420 10BPC)
24: YV16CI2_420_10BPC (Semi planar 420 10BPC with Cb/Cr swap)