AV_BUF_STC_INIT_VALUE1 (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

AV_BUF_STC_INIT_VALUE1 (DISPLAY_PORT) Register Description

Register NameAV_BUF_STC_INIT_VALUE1
Offset Address0x000000B034
Absolute Address 0x00FD4AB034 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionAV_BUF_STC_INIT_VALUE1:

AV_BUF_STC_INIT_VALUE1 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:10razRead as zero0x0
INIT_VALUE1 9:0rwNormal read/write0x09:0: Initial Value most significant 10bits of STC. A write to this register triggers the loading of STC. SW must first write to VALUE0 register above and then write to this register