AV_BUF_STC_SNAPSHOT1 (DISPLAY_PORT) Register Description
| Register Name | AV_BUF_STC_SNAPSHOT1 |
|---|---|
| Offset Address | 0x000000B064 |
| Absolute Address | 0x00FD4AB064 (DISPLAY_PORT) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | AV_BUF_STC_SNAPSHOT1 |
AV_BUF_STC_SNAPSHOT1 (DISPLAY_PORT) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:10 | razRead as zero | 0x0 | |
| STC1 | 9:0 | roRead-only | 0x0 | STC snapshot, MSB 10 bits This register is updated on read to AV_BUF_STC_SNAPSHOT0. SW should read both the snapshot registers to get the correct snapshot(in the sequence AV_BUF_STC_SNAPSHOT0 and AV_BUF_STC_SNAPSHOT1) |