AV_BUF_STC_VIDEO_VSYNC_TS_REG1 (DISPLAY_PORT) Register Description
Register Name | AV_BUF_STC_VIDEO_VSYNC_TS_REG1 |
---|---|
Offset Address | 0x000000B040 |
Absolute Address | 0x00FD4AB040 (DISPLAY_PORT) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | AV_BUF_STC_VIDEO_VSYNC_TS_REG1: STC TS with VSYNC event |
AV_BUF_STC_VIDEO_VSYNC_TS_REG1 (DISPLAY_PORT) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:10 | razRead as zero | 0x0 | |
VSYNC_TS1 | 9:0 | roRead-only | 0x0 | Bits [9:0] of TS register. - =Bits [41:32] of VSYNC TS register |