BANK3_CTRL0 (CRL_APB) Register Description
| Register Name | BANK3_CTRL0 |
|---|---|
| Offset Address | 0x0000000270 |
| Absolute Address | 0x00FF5E0270 (CRL_APB) |
| Width | 10 |
| Type | rwNormal read/write |
| Reset Value | 0x000003FF |
| Description | Drive strength control 0 for DIO bank 3 |
Drive table for [drive0], [drive1]: 00 = 2 mA 01 = 4 mA 10 = 8 mA 11 = 12 Note: Two bits control the drive strength; one bit from BANK3_CTRL0 and one bit from BANK3_CTRL1 (each pair of bits applies to a single I/O pin).
BANK3_CTRL0 (CRL_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| drive0 | 9:0 | rwNormal read/write | 0x3FF | Bit[9]: TCK Bit[8]: TDI Bit[7]: TMS Bit[6]: TDO Bit[5]: SRST Bit[4]: PROG Bit[3]: INIT Bit[2]: DONE Bit[1]: ERROR_OUT Bit[0]: ERROR_STS |