BANK3_CTRL5 (CRL_APB) Register Description
| Register Name | BANK3_CTRL5 |
|---|---|
| Offset Address | 0x0000000284 |
| Absolute Address | 0x00FF5E0284 (CRL_APB) |
| Width | 10 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Slew rate control for DIO bank 3 |
Select slew rate: 0: fast. 1: slow.
BANK3_CTRL5 (CRL_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| slow_fast_slew_n | 9:0 | rwNormal read/write | 0x0 | Bit[9]: TCK Bit[8]: TDI Bit[7]: TMS Bit[6]: TDO Bit[5]: SRST Bit[4]: PROG Bit[3]: INIT Bit[2]: DONE Bit[1]: ERROR_OUT Bit[0]: ERROR_STS |