BRIDGE_CORE_CFG_PCIE_CREDIT (AXIPCIE_MAIN) Register Description
Register Name | BRIDGE_CORE_CFG_PCIE_CREDIT |
---|---|
Offset Address | 0x0000000028 |
Absolute Address | 0x00FD0E0028 (AXIPCIE_MAIN) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00200200 |
Description | PCI Express Transmit Completion Header and Data Credit Metering Configuration |
BRIDGE_CORE_CFG_PCIE_CREDIT (AXIPCIE_MAIN) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
cfg_pcie_credit_en | 31 | rwNormal read/write | 0x0 | Outstanding PCIe read requests are limited to stay within the receive buffer space (CH & CD credits) allocated in the PCI Express Core receive buffer. |
cfg_pcie_credit_ch_inf | 30 | rwNormal read/write | 0x0 | CH Credits Infinite |
cfg_pcie_credit_cd_inf | 29 | rwNormal read/write | 0x0 | CD Credits Infinite |
Reserved | 28:24 | roRead-only | 0x0 | |
cfg_pcie_credit_ch_val | 23:16 | rwNormal read/write | 0x20 | Number of available CH credits. One CH credit == space for 1 Completion TLP Header. |
Reserved | 15:12 | roRead-only | 0x0 | |
cfg_pcie_credit_cd_val | 11:0 | rwNormal read/write | 0x200 | Number of available CD credits. One CD credit == space for 16 bytes of Completion TLP Payload. |