CCR (R5_ETM_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CCR (R5_ETM_1) Register Description

Register NameCCR
Offset Address0x0000000004
Absolute Address 0x00FEBFD004 (CORESIGHT_R5_ETM_1)
Width32
TyperoRead-only
Reset Value0x8D014024
DescriptionConfiguration Code Register

CCR (R5_ETM_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
IDR_present31roRead-only0x1IDR is present.
SW_access27roRead-only0x1Software access is supported.
Trace_present26roRead-only0x1Trace start/stop block is present.
No_of_CIDcmp25:24roRead-only0x1Number of Context ID comparators.
Fifofull_present23roRead-only0x0FIFOFULL logic is absent.
No_of_extout21:20roRead-only0x0Number of external outputs.
No_of_extin19:17roRead-only0x0Number of external inputs.
Sequencer_present16roRead-only0x1The sequencer is present.
No_of_counters15:13roRead-only0x2Number of counters.
No_of_mmaps12:8roRead-only0x0Number of memory map decoders.
No_of_datacmp 7:4roRead-only0x2Number of data comparators.
No_of_addrcmppair 3:0roRead-only0x4Number of pairs of address comparators.