CIDR0 (A53_DBG_2) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CIDR0 (A53_DBG_2) Register Description

Register NameCIDR0
Offset Address0x0000000FF0
Absolute Address 0x00FEE10FF0 (CORESIGHT_A53_DBG_2)
Width32
TyperoRead-only
Reset Value0x0000000D
DescriptionExternal Debug Component Identification Register 0

CIDR0 (A53_DBG_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PRMBL_0 7:0roRead-only0xDPreamble. Must read as 0x0D.