CIDR0 (STM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CIDR0 (STM) Register Description

Register NameCIDR0
Offset Address0x0000000FF0
Absolute Address 0x00FE9C0FF0 (CORESIGHT_SOC_STM)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionCID - Indentification Registers Present.

A component identification register, that indicates that the identification registers are present.

CIDR0 (STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PRMBL_0 7:0roRead-only0x0Contains bits [24:31] of the component identification.