CIDR1 (A53_DBG_2) Register Description
Register Name | CIDR1 |
---|---|
Offset Address | 0x0000000FF4 |
Absolute Address | 0x00FEE10FF4 (CORESIGHT_A53_DBG_2) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000090 |
Description | External Debug Component Identification Register 1 |
CIDR1 (A53_DBG_2) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
CLASS | 7:4 | roRead-only | 0x9 | Component class. Reads as 0x9, debug component. |
PRMBL_1 | 3:0 | roRead-only | 0x0 | Preamble. RAZ. |