CIDR1 (CTI) Register Description
| Register Name | CIDR1 |
|---|---|
| Offset Address | 0x0000000FF4 |
| Absolute Address |
0x00FEBF8FF4 (CORESIGHT_R5_CTI_0) 0x00FEBF9FF4 (CORESIGHT_R5_CTI_1) 0x00FE990FF4 (CORESIGHT_SOC_CTI_0) 0x00FE9A0FF4 (CORESIGHT_SOC_CTI_1) 0x00FE9B0FF4 (CORESIGHT_SOC_CTI_2) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | A component identification register, that indicates that the identification registers are present. This register also indicates the component class. |
CIDR1 (CTI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CLASS | 7:4 | roRead-only | 0x0 | Class of the component. E.g. ROM table, CoreSight component etc. Constitutes bits [15:12] of the component identification. |
| PRMBL_1 | 3:0 | roRead-only | 0x0 | Contains bits [11:8] of the component identification |