CIDR1 (ETF8K) Register Description
Register Name | CIDR1 |
---|---|
Offset Address | 0x0000000FF4 |
Absolute Address | 0x00FE950FF4 (CORESIGHT_SOC_ETF_2) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000090 |
Description | A component identification register, that indicates that the identification registers are present. This register also indicates the component class. |
CIDR1 (ETF8K) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Class | 7:4 | roRead-only | 0x9 | Class of the component. E.g. ROM table, CoreSight component etc. Constitutes bits [15:12] of the component identification. |
Preamble | 3:0 | roRead-only | 0x0 | Contains bits [11:8] of the component identification |