CIDR3 (A53_PMU_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CIDR3 (A53_PMU_1) Register Description

Register NameCIDR3
Offset Address0x0000000FFC
Absolute Address 0x00FED30FFC (CORESIGHT_A53_PMU_1)
Width32
TyperoRead-only
Reset Value0x000000B1
DescriptionPerformance Monitors Component Identification Register 3

CIDR3 (A53_PMU_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PRMBL_3 7:0roRead-only0xB1Preamble. Must read as 0xB1.