CIDR3 (TSGEN) Register Description
| Register Name | CIDR3 |
|---|---|
| Offset Address | 0x0000000FFC |
| Absolute Address | 0x00FE900FFC (CORESIGHT_SOC_TSGEN) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | A component identification register, that indicates that the identification registers are present. |
CIDR3 (TSGEN) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PRMBL_3 | 7:0 | roRead-only | 0x0 | Contains bits[31:24] of the component identification code. |