CLAIMCLR (R5_ETM_0) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CLAIMCLR (R5_ETM_0) Register Description

Register NameCLAIMCLR
Offset Address0x0000000FA4
Absolute Address 0x00FEBFCFA4 (CORESIGHT_R5_ETM_0)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionClaim Tag Clear Register

CLAIMCLR (R5_ETM_0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CLAIM 7:0rwNormal read/write0x0Claim clear bits. Reading this field returns the current value of the CLAIM bits. Writing a 1 to one of these bits clears the corresponding CLAIM bit to 0. This is an indirect write to the CLAIM bits. A single write operation can clear multiple bits to 0. Writing 0 to one of these bits has no effect.