CLAIMSET (A53_DBG_2) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CLAIMSET (A53_DBG_2) Register Description

Register NameCLAIMSET
Offset Address0x0000000FA0
Absolute Address 0x00FEE10FA0 (CORESIGHT_A53_DBG_2)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDebug Claim Tag Set Register

CLAIMSET (A53_DBG_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CLAIM 7:0rwNormal read/write0Claim set bits. RAO.Writing a 1 to one of these bits sets the corresponding CLAIM bit to 1. This is an indirect write to the CLAIM bits.A single write operation can set multiple bits to 1. Writing 0 to one of these bits has no effect.