CLAIMSET (A53_ETM_3) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CLAIMSET (A53_ETM_3) Register Description

Register NameCLAIMSET
Offset Address0x0000000FA0
Absolute Address 0x00FEF40FA0 (CORESIGHT_A53_ETM_3)
Width32
TyperwNormal read/write
Reset Value0x0000000F
DescriptionClaim Tag Set Register

CLAIMSET (A53_ETM_3) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
SET 7:0rwNormal read/write0xFWhen a write to one of these bits occurs, with the value:When a read occurs, the implemented bits in the SET field are RAO and therefore the value the register returns indicates how many SET bits are supported. Any unimplemented bits in the SET field are RAZ. A debug agent can read this register to discover the width of the claim tag.Software must use the
register to read the values of the claim tag and to clear a claim tag bit to 0.