CLKMON_MASK (CRL_APB) Register Description
Register Name | CLKMON_MASK |
Offset Address | 0x0000000144 |
Absolute Address |
0x00FF5E0144 (CRL_APB)
|
Width | 16 |
Type | roRead-only |
Reset Value | 0x0000FFFF |
Description | Clock Monitor Interrupt Mask. |
This is a read-only location and can be atomically altered by either the IDR or the IER.
CLKMON_MASK (CRL_APB) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
cnta7_over_err | 15 | roRead-only | 0x1 | Mask for clk_check |
mon7_err | 14 | roRead-only | 0x1 | Mask for clk_check |
cnta6_over_err | 13 | roRead-only | 0x1 | Mask for clk_check |
mon6_err | 12 | roRead-only | 0x1 | Mask for clk_check |
cnta5_over_err | 11 | roRead-only | 0x1 | Mask for clk_check |
mon5_err | 10 | roRead-only | 0x1 | Mask for clk_check |
cnta4_over_err | 9 | roRead-only | 0x1 | Mask for clk_check |
mon4_err | 8 | roRead-only | 0x1 | Mask for clk_check |
cnta3_over_err | 7 | roRead-only | 0x1 | Mask for clk_check |
mon3_err | 6 | roRead-only | 0x1 | Mask for clk_check |
cnta2_over_err | 5 | roRead-only | 0x1 | Mask for clk_check |
mon2_err | 4 | roRead-only | 0x1 | Mask for clk_check |
cnta1_over_err | 3 | roRead-only | 0x1 | Mask for clk_check |
mon1_err | 2 | roRead-only | 0x1 | Mask for clk_check |
cnta0_over_err | 1 | roRead-only | 0x1 | Mask for clk_check |
mon0_err | 0 | roRead-only | 0x1 | Mask for clk_check |