CNTCTLR0 (A53_ETM_2) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CNTCTLR0 (A53_ETM_2) Register Description

Register NameCNTCTLR0
Offset Address0x0000000150
Absolute Address 0x00FEE40150 (CORESIGHT_A53_ETM_2)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionCounter Control Register 0

CNTCTLR0 (A53_ETM_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
RLDSELF16rwNormal read/write0x0Controls whether a reload event occurs for counter 0, when counter 0 reaches zero:
RLDTYPE15rwNormal read/write0x0Selects the resource type for the reload: 0=single, 1=boolean combined
RLDSEL11:8rwNormal read/write0x0Selects the resource number, based on the value of RLDTYPE:
When RLDTYPE is 0, selects a single selected resource from 0-15 defined by bis[3:0]; when RLDTYPE is 1, selects a Boolean combined resource pair from 0-7 defiend by bits[2:0].
CNTTYPE 7rwNormal read/write0x0Selects the resource type for the counter: 0=single, 1=boolean combined
CNTSEL 3:0rwNormal read/write0x0Selects the resource number, based on the value of CNTTYPE:
When CNTTYPE is 0, selects a single selected resource from 0-15 defined by bis[3:0]; when CNTTYPE is 1, selects a Boolean combined resource pair from 0-7 defiend by bits[2:0].