CONFIGR (A53_ETM_0) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CONFIGR (A53_ETM_0) Register Description

Register NameCONFIGR
Offset Address0x0000000010
Absolute Address 0x00FEC40010 (CORESIGHT_A53_ETM_0)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionTrace Configuration Register

CONFIGR (A53_ETM_0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DV17rwNormal read/write0x0Data value tracing bit
DA16rwNormal read/write0x0Data address tracing bit
QE14:13rwNormal read/write0x0Q element enable field
RS12rwNormal read/write0x0Return stack enable bit
TS11rwNormal read/write0x0Global timestamp tracing bit
COND10:8rwNormal read/write0x0Conditional instruction tracing bit
VMID 7rwNormal read/write0x0VMID tracing bit
CID 6rwNormal read/write0x0Context ID tracing bit
CCI 4rwNormal read/write0x0Cycle counting instruction trace bit
BB 3rwNormal read/write0x0Branch broadcast mode bit
INSTP0 2:1rwNormal read/write0x0Instruction P0 bit