CONFIG_REG3 (PSSYSMON) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CONFIG_REG3 (PSSYSMON) Register Description

Register NameCONFIG_REG3
Offset Address0x000000010C
Absolute Address 0x00FFA5090C (AMS_PS_SYSMON)
Width16
TyperwNormal read/write
Reset Value0x00000000
DescriptionConfig Reg 3: Alarm disables.

0: enabled. 1: disabled. PS SysMond does not impletment the I2C interface.

CONFIG_REG3 (PSSYSMON) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
alarm_disable13to8 5:0rwNormal read/write0x0Alarm Disables.
Bit [0] Alarm 8, VCCO_PSIO1.
Bit [1] Alarm 9, VCCO_PSIO2.
Bit [2] Alarm 10, PS_MGTRAVCC.
Bit [3] Alarm 11, PS_MGTRAVTT.
Bit [4] Alarm 12, VCC_PSADC.
Bit [5] Alarm 13, Temp_FPD (near APU).