CONTROL (SWDT) Register Description
| Register Name | CONTROL |
|---|---|
| Offset Address | 0x0000000004 |
| Absolute Address |
0x00FFCB0004 (CSU_WDT) 0x00FF150004 (SWDT) 0x00FD4D0004 (WDT) |
| Width | 26 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00003FFC |
| Description | Counter Control Register |
CONTROL (SWDT) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CKEY | 25:14 | woWrite-only | 0x0 | Counter access key - writes to the control register are only valid if this field is set to 0x248; this field is write only. |
| CRV | 13:2 | rwNormal read/write | 0xFFF | Counter restart value - the counter is restarted with the value 0xNFFF, where N is the value of this field. |
| CLKSEL | 1:0 | rwNormal read/write | 0x0 | Counter clock prescale - selects the prescaler division ratio: 00 = LPD_LSBUS_CLK clock divided by 8 01 = LPD_LSBUS_CLK clock divided by 64 10 = LPD_LSBUS_CLK clock divided by 512 11 = LPD_LSBUS_CLK clock divided by 4096 Note: If a restart signal is received the prescaler should be reset. |