CSUDMA_DST_STS (CSUDMA) Register Description
Register Name | CSUDMA_DST_STS |
---|---|
Offset Address | 0x0000000808 |
Absolute Address | 0x00FFC80808 (CSUDMA) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | General DST DMA Status |
CSUDMA_DST_STS (CSUDMA) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | razRead as zero | 0x0 | RESERVED. Return 0 when read. Writes ignored. |
DONE_CNT | 15:13 | wtcReadable, write a 1 to clear | 0x0 | Number of completed DST DMA transfers that have not been acknowledged by software: 000 - all finished transfers have been acknowledged; 001 - one finished transfer is still outstanding; etc 111 - seven or more finished transfers is still outstanding. A finished transfer is acknowledged by clearing the interrupt status flag 'DONE". This count is cleared by an explicit write of 3b111 to this field. |
DST_FIFO_LEVEL | 12:5 | roRead-only | 0x0 | Provide the current DST FIFO level in 32-bit words. 8h00: Empty 8h01: 1 entry etc 8h80: 128 entries |
WR_OUTSTANDING | 4:1 | roRead-only | 0x0 | Indicates how many memory write commands are currently outstanding in the system. An outstanding write command is one that has been issued to memory and the BRESP associated with that command has not yet been returned from memory. 4h0: 0 cmds outstanding etc 4h8: 8 cmds outstanding 4h9: 9 cmds outstanding |
BUSY | 0 | roRead-only | 0x0 | BUSY=1: The CSU DMA stream->memory channel is busy processing the current command and cannot accept a new command. BUSY=0: implies DMA is DONE with the transfer, the DST FIFO and any associated pipeline registers are empty. DMA may accept a new command. Note that, BUSY essentially indicates that the DMA still has remaining work to do. BUSY will reflect this status irrespective of whether the PAUSE_* is asserted or not. |