CSUDMA_SRC_ADDR_MSB (CSUDMA) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CSUDMA_SRC_ADDR_MSB (CSUDMA) Register Description

Register NameCSUDMA_SRC_ADDR_MSB
Offset Address0x0000000028
Absolute Address 0x00FFC80028 (CSUDMA)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSource mem address (msbs) for DMA memory->stream data transfer

CSUDMA_SRC_ADDR_MSB (CSUDMA) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:17razRead as zero0x0RESERVED. Return 0 when read. Writes ignored.
ADDR_MSB16:0rwNormal read/write0x0Source memory address (msbs) for DMA memory->stream data transfer
Refer to the description for CSUDMA_SRC_ADDR for full details. This field is the 17 msbs of the full 49-bit SRC address
The full 49-bit source address is comprised of this field concatenated with the CSUDMA_SRC_ADDR field as follows:
49-bit SRC address = {ADDR_MSB, CSU_DMA_SRC_ADDR.ADDR, 2b00}