CSUDMA_SRC_I_MASK (CSUDMA) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CSUDMA_SRC_I_MASK (CSUDMA) Register Description

Register NameCSUDMA_SRC_I_MASK
Offset Address0x0000000020
Absolute Address 0x00FFC80020 (CSUDMA)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x0000007F
DescriptionSRC DMA Interrupt Mask

Reads will return the status of the interrupt mask - 1 indicates mask the interrupt, do not pass it along - 0 indicates do not mask the interrupt, pass it along as is. Writes to this register are ignored.

CSUDMA_SRC_I_MASK (CSUDMA) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:7razRead as zero0x0RESERVED. Return 0 when read. Writes ignored.
INVALID_APB 6roRead-only0x1See SRC DMA Interrupt Sticky Register for field description
THRESH_HIT 5roRead-only0x1See SRC DMA Interrupt Sticky Register for field description
TIMEOUT_MEM 4roRead-only0x1See SRC DMA Interrupt Sticky Register for field description
TIMEOUT_STRM 3roRead-only0x1See SRC DMA Interrupt Sticky Register for field description
AXI_RDERR 2roRead-only0x1See SRC DMA Interrupt Sticky Register for field description
DONE 1roRead-only0x1See SRC DMA Interrupt Sticky Register for field description
MEM_DONE 0roRead-only0x1See SRC DMA Interrupt Sticky Register for field description