CSUDMA_SRC_STS (CSUDMA) Register Description
| Register Name | CSUDMA_SRC_STS |
|---|---|
| Offset Address | 0x0000000008 |
| Absolute Address | 0x00FFC80008 (CSUDMA) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | General SRC DMA Status |
CSUDMA_SRC_STS (CSUDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | razRead as zero | 0x0 | RESERVED. Return 0 when read. Writes ignored. |
| DONE_CNT | 15:13 | wtcReadable, write a 1 to clear | 0x0 | Number of completed SRC DMA transfers that have not been acknowledged by software: 000 - all finished transfers have been acknowledged; 001 - one finished transfer is still outstanding; etc 111 - seven or more finished transfers is still outstanding. A finished transfer is acknowledged by clearing the interrupt status flag 'DONE". This count is cleared by an explicit write of 3b111 to this field. |
| SRC_FIFO_LEVEL | 12:5 | roRead-only | 0x0 | Indicates the current SRC FIFO level in 32-bit words. 8h00: Empty 8h01: 1 entry etc 8h80: 128 entries |
| RD_OUTSTANDING | 4:1 | roRead-only | 0x0 | Indicates how many memory read commands are currently outstanding in the system. An outstanding read command is one that has been issued to memory and all the data associated with that command has not yet been returned from memory. 4h0: 0 cmds outstanding etc 4h8: 8 cmds outstanding 4h9: 9 cmds outstanding |
| BUSY | 0 | roRead-only | 0x0 | BUSY=1: DMA has not completed all its work BUSY=0: DMA is DONE with the transfers, the SRC FIFO and any associated pipeline registers are all empty Note that, BUSY essentially indicates that the DMA still has remaining work to do. BUSY will reflect this status irrespective of whether the PAUSE_* is asserted or not. |