CSU_BR_ERROR (PMU_GLOBAL) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CSU_BR_ERROR (PMU_GLOBAL) Register Description

Register NameCSU_BR_ERROR
Offset Address0x0000000528
Absolute Address 0x00FFD80528 (PMU_GLOBAL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionBootROM Error detection and code.

When the BootROM fails to complete, the cause of failure is recorded and the [BR_ERROR] bit is set = 1. The event is captured in the ERROR_STATUS_2 [PMU_PB] bit. Both bit fields are reset only by the PS_POR_B reset signal pin.

CSU_BR_ERROR (PMU_GLOBAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
BR_ERROR31rwNormal read/write0x0BootROM error detected.
0: no error.
1: error occurred and the code is in [ERR_TYPE].
This is a System Error routed to the interrupt status and clear registers.
This bit is written by CSU BootROM.
Reserved30:16roRead-only0x0reserved
ERR_TYPE15:0rwNormal read/write0x0BootROM Error Code.
Bits [15:0] are written by the BootROM when a fatal error occurs.